Look at the WSI chips, they are specifically designed for the '51 and provide memory mapped I/O (3 extra ports if I remember). My 'standard' method is to use a CPLD ( I'm crying in my beer bacause Xilinix dropped the 5V CoolRunners ), they are not that much more expensive than the 8255 and you can integrate the ALE latch. Also as opposed to 8255 designs, you do not end up with a decoder here, an inverter there and a latch somewhere to make the 8255 fit your application.
TGIF
Erik