| ??? 03/18/01 22:44 Read: times |
#10107 - RE: Sram writing, and preventing |
No, you just need a memory address decoder for your CS lines. Your SRAM can be run by driving CS with A15, your IO space can begin by inverting A15, for a very large I/O space, or however else you want to hack it.
CS does what you expect, it selects the chip and unless CS is asserted, you can't affect the chip with the RD and WR lines. Steve |
| Topic | Author | Date |
| Sram writing, and preventing | 01/01/70 00:00 | |
| RE: Sram writing, and preventing | 01/01/70 00:00 | |
| RE: Sram writing, and preventing | 01/01/70 00:00 | |
| RE: Sram writing, and preventing | 01/01/70 00:00 | |
| RE: Sram writing, and preventing | 01/01/70 00:00 | |
RE: Sram writing, and preventing | 01/01/70 00:00 |