| ??? 11/28/05 08:51 Read: times |
#104244 - thanks Responding to: ???'s previous message |
Thanks everybody.
I am sorry for the xls file not being on my homepage; I had a quite high fever when I wrote that and obviously forgot to update the server or something... (I am missing several files from there I am almost sure I was uploading them... Was I dreaming that or what :-? ). I will do it tonight. Oleg Sergeev said:
Due many modern derivatives have different number of cycles as well as additional opcode(s). I know the 1- and 4-clockes tend to have different number of cycles; the trouble is there is too many of them and the differences are slight, moreover there are also instructions with "undefinable" number of cycles, e.g. external memory accesses with variable waitstates, jumps having different execution time depending on state of jumpcache in faster derivatives etc. It's getting *slightly* similar to what happens in a modern PC/x86... Of course, I can do it based on "best case" similar as the table of fast derivatives was constructed. Oleg, except of the rather exotic WinEdge chip I am not aware of more than 1 additional instruction (at the unused opcode, 0A5h), can you please give me examples? Jan Waclawek |
| Topic | Author | Date |
| 8051 opcodes matrix | 01/01/70 00:00 | |
| Comment | 01/01/70 00:00 | |
| Improvement | 01/01/70 00:00 | |
| Comment | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| Oleg suggested | 01/01/70 00:00 | |
| yep | 01/01/70 00:00 | |
| as I remember | 01/01/70 00:00 | |
| yep | 01/01/70 00:00 | |
| updated | 01/01/70 00:00 | |
| Mistakes/errors | 01/01/70 00:00 | |
| corrected, but | 01/01/70 00:00 | |
oh yes, | 01/01/70 00:00 |