I have interfaced a TI 16C550 UART to my 805X Engine board. The firmware utilizes the interrupts from the UART for receiving data on a character by character basis and it works flawlessly. (I have developed many systems utilizing the 805X with external UART's for years without any problems.)

The problems arise when I initialize the 16C550 to operate in the FIFO mode. I still get all of the correct interrupts, but it appears as though the receiver buffer-to-FIFO buffer transfer operation in the 16C550 is dropping characters! I have tried changing the FIFO threshold with no observable difference. I have added code to ensure that there are no overrun errors and that the interrupts are indeed the result of the FIFO threshold being reached.

The interrupt handling code does the following:

1. Verify that interrupt id reg bits [3..0] are 04H or 0CH (FIFO threshold or receive time-out interrupt).
2. Examine line status reg bit 0. If bit 0 = 1, data is in the FIFO so read the next character from the FIFO buffer and store it in a RAM buffer.
3. Repeat step 2 until line status reg bit 0 = 0.

Another clue is that the third character retrieved from the buffer appears to have overwritten the second character. If the string 'ABCD' is sent to the UART, the string 'ACCD' is retrieved from the FIFO buffer.

I have read every document about the 16C550 that I can find but they haven't been of much use primarily because there are no interrupt handling examples shown for the FIFO mode.

If anyone can shed light on this problem, I would be forever grateful because this is driving me crazy!