??? 12/25/99 10:42 Read: times |
#1091 - RE: 32bit maths on 8052 |
Steve, some tips that I've been using when programming a 24 bit fixed point x 16 bit fixed point floating multiply. It runs at 16 MHz & 5200/sec. interrupt rate. There are also additions and subtractions (it takes 120 us to do it).
1. use registers as much as possible (a 32 bit value can be hold in registers R4..R7, an 16 bit value at registers R2..R3. In the main program put the 32 bit variable at address 0x0c, and a 16 bit variable at address 0x0a, only the switching of the memory bank when entering the routine (takes 2 cycles) and your registers are already loaded with the values. 2. take the advantage of XCH instruction and use it as much as possible (of course you have a mess, if you don't trace the values very strictly for they change places in the memory) XCH instruction that replaces 2 MOV instructions gives you the profit of 1 cycle. 3. make a simulation of the routine by hand and remove redundant instructions (when multiplying LSB's the result will never be larger than 0xfe01 etc.) Here is an example of how I did it: ;---------------------------------------------------------------------- CSEG AT 0BH ;Timer 0 interrupt entry USING 1 ;register bank 1 TIMER0: MOV s_acc,A ;PUSH ACC PUSH B MOV A,#08H ;register bank 1 XCH A,PSW ; !!!! faster !!!! MOV s_psw,A ;PUSH PSW MOV ADCON,#08H ;ADC0 select & start conv. MOV R7,coef+1 ;DFT coefficient MOV R6,coef MOV R3,s1+2 ;mul. 2*coef*s1 MOV R2,s1+1 MOV R1,s1 ;---------------------------------------------------------------------- ; ; Integer fixed decimal point multiply 24 * 16 bit ; ; zz.zzzz = (xx.xxxx * .yyyy) * 2; ; (2 * cos(2*PI*k/N)) ; ; xx.xxxx - 24 bit signed integer ; .yyyy - 16 bit unsigned integer ; ; int24 imul (int24 s1, unsigned int coef); ;---------------------------------------------------------------------- mul24: MOV A,R1 ;s_reg = mul24(s1 * coef) RLC A ;s1 < 0 MOV neg,C JNC mulr24 ;not negative number muln24: CLR C ;s1 < 0 --> s1 = -s1 CLR A ; (2's complement) SUBB A,R3 MOV R3,A CLR A SUBB A,R2 MOV R2,A CLR A SUBB A,R1 MOV R1,A mulr24: MOV A,R3 ;actual multiply MOV B,R7 MUL AB ;a-lo * b-lo (R3 * R7) RLC A ;round product MOV A,R6 XCH A,B ADDC A,#0 XCH A,R3 MUL AB ;a-lo * b-hi (R3 * R6) ADD A,R3 MOV R3,A MOV A,R7 XCH A,B ADDC A,#0 MOV R4,A ;max = FEFF01 MOV A,R2 MUL AB ;a-mid * b-lo (R2 * R7) ADD A,R3 XCH A,R4 ADDC A,B MOV R5,A CLR A RLC A XCH A,R2 MOV B,R6 MUL AB ;a-mid * b-hi (R2 * R6) ADD A,R5 MOV R5,A MOV A,R1 XCH A,B ADDC A,R2 XCH A,R7 ;max = FFFE0001 MUL AB ;a-hi * b-lo (R1 * R7) ADD A,R5 MOV R5,A MOV A,R1 XCH A,B ADDC A,R7 MOV R7,A CLR A RLC A XCH A,R6 MUL AB ;a-hi * b-hi (R1 * R6) ADD A,R7 XCH A,R6 ADDC A,B XCH A,R4 ;result * 2 RLC A MOV A,R5 RLC A XCH A,R6 ;R6-lo RLC A XCH A,R4 ;R4-mid RLC A MOV R5,A ;R5-hi, R4-mid, R6-lo JNB neg,_tim3 ;positive number, done CLR C ;result back to negative number CLR A ; (2's complement) SUBB A,R6 MOV R6,A CLR A SUBB A,R4 MOV R4,A CLR A SUBB A,R5 MOV R5,A ;R5-hi, R4-mid, R6-lo ;---------------------------------------------------------------------- _tim3: CLR C ;s_reg -= s2 MOV A,R6 ;R5-hi, R4-mid, R6-lo SUBB A,s2+2 XCH A,R4 SUBB A,s2+1 XCH A,R5 SUBB A,s2 MOV R7,A ;R7-hi, R4-lo, R5-mid MOV A,ADAT ;s_reg += (ADAT << 7) CLR C RRC A MOV R6,A CLR A ;max. teleg. voltage 2 Vpp RRC A ADD A,R4 XCH A,R5 ;R5-lo ADDC A,R6 XCH A,R7 ;R7-mid ADDC A,#0 ;ACC-hi XCH A,s1 ;s2 = s1 MOV s2,A ;s1 = s_reg MOV A,R7 XCH A,s1+1 MOV s2+1,A MOV A,R5 XCH A,s1+2 MOV s2+2,A DJNZ n,_tim1 ;if (--n == 0) JBC nh_bit,_tim1 SETB nh_bit ;Goertzel loop counter hi-bit MOV n,#LOW NS ;n = NS, hi - only one bit MOV re,s1 ;re = s1 MOV re+1,s1+1 MOV im,s2 ;im = s2 MOV im+1,s2+1 CLR A MOV s1,A ;s1 = 0 MOV s1+1,A MOV s1+2,A MOV s2,A ;s2 = 0 MOV s2+1,A MOV s2+2,A SETB eoc ;end of DFT conversion _tim1: JBC fr_adj,_tim2 ;5200Hz freq.compensation SETB fr_adj ;f = sysclk / 256.5 DEC TL0 ;decr. TL0 - even interrupts _tim2: MOV PSW,s_psw ;POP PSW POP B MOV A,s_acc ;POP ACC RETI ;---------------------------------------------------------------------- |
Topic | Author | Date |
32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052 | 01/01/70 00:00 | |
RE: 32bit maths on 8052![]() | 01/01/70 00:00 |