having extra internal EEPROM), which has 128-byte block but it's erasure happens transparently to the user, behaving as if it would be a completely bytewise-reprogrammable device (only with impact on "wearout" of the block, if bytes within it are "reprogrammed" often, one "full cycle" spent on "reprogramming" a single byte, requiring "smart" approach (write as many bytes at once as possible/needed) to reduce wear).
that is the reason NOT to use "bytewise-reprogrammable" chips.

With a traditional block erase, you can implement a "walking write" and thus make saveral writes per "endurance reduction".

for one of my projects, where I write 8 bytes to a ik sector, I gain a 128fold increase in lifetime by this.

Erik