| ??? 03/22/06 11:05 Read: times Msg Score: +1 +1 Good Answer/Helpful |
#112765 - pullup + loading capacitance Responding to: ???'s previous message |
The picture is slightly more complicated if you want to know what happens with a port1/2/3 pin set previously to "1" from inside (i.e.the low-side driver is off), when pulled to 0 externally and then left floating (i.e. driven from outside by an open collector or by a grounded switch).
The internal pullup consists of a little bit weird combination of transistors, but generally it is quite weak, the equivalent of say 100kOhm (maybe slightly less but this order of magnitude). This is OK as long as there is no significant loading/parasitic capacitance present on this pin (e.g. long traces or cables). The pullup with the capacitance forms a "RC delay", so if the capacitance is high, it takes considerable time while the voltage grows high again. A good description of this can be found in one of the Atmel's version of "bible", http://www.atmel.com/dyn/resou...OC4316.PDF , chapter 2.5.3. Jan Waclawek |
| Topic | Author | Date |
| About I/O 89C52 | 01/01/70 00:00 | |
| what about reading this thread | 01/01/70 00:00 | |
| hmm ? | 01/01/70 00:00 | |
| So, read it. | 01/01/70 00:00 | |
| but | 01/01/70 00:00 | |
| yes | 01/01/70 00:00 | |
| reread the "bible" | 01/01/70 00:00 | |
| so | 01/01/70 00:00 | |
| bfore reading a 1 read the bible | 01/01/70 00:00 | |
| Ports | 01/01/70 00:00 | |
pullup + loading capacitance | 01/01/70 00:00 | |
| No | 01/01/70 00:00 | |
| so that's true ? | 01/01/70 00:00 | |
| no else if | 01/01/70 00:00 |