You must first decide on the "memory-map" you want to create.

If you want, for example, to map your external memory-mapped peripherals into the top 16 memory locations, you can combine the nRD and nWR signals, which always become active during external data memory cycles, with a negative-logic OR, which, by deMorgan's theorem is a NAND gate (74HC00), and feed that to an input of a 13-input NAND gate (74S133) or equivalent, which will then, at its output, define, with a low-going strobe, an I/O space of 16-byte extent. If you want to subdivide that I/O space into individual bytes, you'd probably want to use a pair of data distributor/address-decoders such as a 74HC138, which have three enables, of which two are low-going. Use one low going enable to receive the nIO signal from the 74S133, and the other for either nRD or nWR, and you've got eight decoded nRD and eight decode nWR signals that can be used for individual devices. You can, of course, extend this arbitrarily.

On the other hand, if you wish to decode the lower half of external memory space, for a 32Kx8 SRAM, for example, you'd simply combine those two signals in the same way, with the A15 line which you obtain from P2's MSB via an OR gate, e.g. 74HC32, and that will provide you with a useable nCS for your external RAM. The nOE should be driven with nRD, and the nWE with nWR. That locates your SRAM in the lower half of external memory, which will overlap the internal memory resources of your MCU. The MCU will help sort this out, since it doesn't generate the nRD or nWR signals for internal resources. If you'd prefer to use the upper half of external memory space, you need simply insert an inverter in the A15 line before the OR (negative-logic NAND) gate. You might find it helpful to exclude the top 16 bytes if you're decoding I/O as I described. This can be accomplished by feeding the nIO signal you've created with the 74S133 to the positive-going chip select on the 32Kx8 SRAM. There are other ways, of course, but this is one way.

If you spend a little time looking at simple SSI/MSI logic data books, you'll quickly "get the hang" of it. It takes a bit of work with truth-tables, Karnaugh maps, etc, but you can do it if you're willing to invest the effort. Reading one or two books on digital logic wouldn't hurt.

RE