Hi,

I have been looking at several suppliers of 8052's. It's very confusing.

Intel 87C52: 2 level IRQ priority, 1 DPTR, Standard UART

Intel 80C52: 4 level IRQ priority. Modified UART.

Atmel 89C52: 2 level IRQ prioryty, 1 DPTR

Philips 8052: 4 level IRQ priority, Modified UART, 2 DPTR

This doesn't include the "Turbo" versions that use less clock cycles per instruction.

What made Intel make the EPROM version have less UART and interrupt level features than their mask ROM version?

What's going on here? Any comments?


Jesper