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???
06/06/01 04:45
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#12227 - 8051 nesting
Hey you guys all ,Please answer my queation if you have some time , I use interrupt nesting for 2nd interrupt priority permission like this

isr1: call isr1_nest_enable
===========
isr 1 task
============
ret
isr1_nest_enable: ret

it's all like this but I 've more thing to configure such as ie,psw but I didn't write above .

after that I've put this to Hitex - ICE but its result is forever stuck at isr1. I've tried step 1 line (low level lang) at isr1 when call nest_enable .the sp is increased (pc+3 is saved) but when reti there's no pop off the isr1+3 address (which would result in next instruction execute).
I think that may be memory of reti and ret address are seperated (for reti may not be in stack).
But when it return with reti as source above it come to isr1 like isr1 is interrupt again (when interrput save PC = PC).
Do ya all have any suggestion for this.





List of 3 messages in thread
TopicAuthorDate
8051 nesting            01/01/70 00:00      
RE: 8051 nesting            01/01/70 00:00      
RE: 8051 nesting            01/01/70 00:00      

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