Idle Mode
An instruction that sets PCON.0 causes that to be the last
instruction executed before going into the Idle mode, the internal
clock signal is gated off to the CPU but not to the Interrupt, Timer,
and Serial Port functions. The CPU status is preserved in its
entirety; the Stack Pointer, Program Counter, Program Status Word,
Accumulator, and all other registers maintain their data during Idle.
The port pins hold the logical states they had at the time Idle was
activated. ALE and PSEN hold at logic high levels.

Power-Down Mode
An instruction that sets PCON.1 causes that to be the last
instruction executed before going into the Power Down mode. In the
Power Down mode, the on-chip oscillator is stopped. With the clock
frozen, all functions are stopped, the contents of the on-chip RAM
and Special Function Registers are maintained. The port pins output
the values held by their respective SFRs. The ALE and PSEN
output are held low.