I've avoided positive-reset devices, in general. Intel's approach to positive-going resets and interrupts was really stupid for small systems, particularly those that used a shared bus, which was most of them back when these parts became popular. The positive-going reset has always been a problem and continues to be. It requires complex buffering, i.e. buffers with tristate or open-collector/open-drain outputs gated with the reset output from the MCU and timed with a one-shot of some sort. Many of the popular "reset" IC's don't even manage this situation properly for cases where the RESET is not only an input but also, occasionally, an output, e.g. when the watchdog times out.

A simple open collector receiver can buffer a negative-going reset or interrupt, and the one, and only one, pullup is always adequate to ensure it returns to an inactive level when not externally driven.

As has already been stated, TTL, which was the logic family most used when these MCU's became available, generally drives 16 mA to LOW level, while only able to drive 1.6 mA to a high level. TTL inputs are NPN emitters, i.e. they drive their input high, weakly, but, nevertheless, high. If one has a dozen devices relying on that reset, driving it high when it's got to be normally low will be difficult, and the circuit which drives it has to be replicated on each device that may need to do so. Since TTL is weak when driving UP, but strong when driving DOWN, which would YOU choose?

Since IBM wasn't smart enough to build their own PC on schedule and within budget, their use of the 80188 prototype board that Intel provided them, and which they ultimately used as the model for their PC, stuck them with that stupid, Stupid, STUPID positive going reset and interrupt structure as well. That's why there's been trouble in PC's when more than one device wants to use a given interrupt or to hit the RESET.

RE