Hello,

I have written this code to communicate with a CODEC Chip CS42528.
When I send the Chip address I am not able to get the ACK bit from the CODEC chip. Please can someone tell me where I could have gone wrong?

I have posted this question in the MCU Forum of Silabs too.

Thanks

; copyright 2001, cygnal integrated products, inc.
;
; file:        I2CCS42528.asm
; device:      c8051f310r
; date:        18 Dec 06
;
; this program provides an example of how to configure the I2C Interface
; an internal 24500000hz internal oscillator is used as the system clock source.;
;----------------------------------------------------------------


$include (c8051f310.inc); include register definition file.

;----------------------------------------------------------------
; EQUATES
;----------------------------------------------------------------

GREEN_LED   equ   P3.3; Green LED: '1' is ON	

SMB_MTSTA   equ   0xE0;(MT) start transmitted


; stack

stack       segment idata   ; declare stack segment
            rseg  stack
            ds    80h       ; reserve 128 bytes for stack


;-----------------------------------------------------------------------------
; byte definitions
;-----------------------------------------------------------------------------

receive_byte  equ 32h ; Received byte after Read operation

;-----------------------------------------------------------------------------
; reset and interrupt vector table
;-----------------------------------------------------------------------------

cseg at 0           
		 ljmp  main

         	  org   0bh
            ljmp  timer0_isr       ; timer0 overflow interrupt	
						                  
;----------------------------------------------------------------
; main program code
;----------------------------------------------------------------

pm33      segment  code; declare code segment
            rseg  pm33 ; select code segment
            using 0    ; using register bank 0
;----------------------------------------------------------------
; main subroutines
;----------------------------------------------------------------
main:
            anl   pca0md, #not(040h)      ; clear watchdog enable bit
            mov   sp, #stack-1   ; init stack pointer
	    clr   a              ; wait at least 1ms
            djnz  acc, $         ;  wait 512us
            djnz  acc, $         ;  wait 512us
	    mov   r0,#07fh
clear_RAM:  mov @r0,#00
            djnz r0,clear_RAM; to clear the RAM bytes 00 to 7Fh								
call port_io_init ; Initialize ports for SCL,SDA and P3.3 (LED)
mov  OSCICN,#083h ; internal oscillator					 
lcall timer_init  ; timer initialisation
lcall timer0_init ; timer 0 initialisation		
acall SMBus_Init  ; Initialize SMBus		
lcall interrupts_init ; interrupts enable    
         
call receive; Read the chip I.D and revision history byte (address 01)	
			
clr   GREEN_LED; Initialize LED to OFF
        
					         
Loop2:      mov   R7, #03h; Code to Blink LED  		
Loop1:      mov   R6, #00h
Loop0:      mov   R5, #00h
            djnz  R5, $
            djnz  R6, Loop0
            djnz  R7, Loop1
            jmp   Loop2


;----------------------------------------------------------------
; subroutines
;----------------------------------------------------------------
port_io_init:
   ; P0.0  -  SDA (SMBus), Open-Drain, Digital
    ; P0.1  -  SCL (SMBus), Open-Drain, Digital
    ; P0.2  -  Unassigned,  Open-Drain, Digital
    ; P0.3  -  Unassigned,  Open-Drain, Digital
    ; P0.4  -  Unassigned,  Open-Drain, Digital
    ; P0.5  -  Unassigned,  Open-Drain, Digital
    ; P0.6  -  Unassigned,  Open-Drain, Digital
    ; P0.7  -  Unassigned,  Open-Drain, Digital

    ; P1.0  -  Unassigned,  Open-Drain, Digital
    ; P1.1  -  Unassigned,  Open-Drain, Digital
    ; P1.2  -  Unassigned,  Open-Drain, Digital
    ; P1.3  -  Unassigned,  Open-Drain, Digital
    ; P1.4  -  Unassigned,  Open-Drain, Digital
    ; P1.5  -  Unassigned,  Open-Drain, Digital
    ; P1.6  -  Unassigned,  Open-Drain, Digital
    ; P1.7  -  Unassigned,  Open-Drain, Digital
    ; P2.0  -  Unassigned,  Open-Drain, Digital
    ; P2.1  -  Unassigned,  Open-Drain, Digital
    ; P2.2  -  Unassigned,  Open-Drain, Digital
    ; P2.3  -  Unassigned,  Open-Drain, Digital
    ; P3.3  -  Unassigned,  Push-pull, Digital  
		                                 
    mov   XBR0,   #004h
    mov   XBR1,   #040h         ; Enable the Port I/O Crossbar
    orl   P3MDOUT,#08h          ; make LED pin output push-pull
    orl   P3MDIN, #08h          ; make LED pin input mode digital
    ret


 
;TIMER INITIALIZATON
timer_init:
mov  TMOD,#002h ;Mode 2: 8-bit counter/timer with auto-reload
mov  CKCON,#004h ;1: Counter/Timer 0 uses the system clock.   
ret

;INTERRUPT INITIALIZATON
interrupts_init:    
setb et0 ; enable timer0	
setb ea  ; Enable global interrupts
ret;TIMER0 INITIALIZATON for SMBus clock source of 100 kHz

timer0_init: mov TH0,#0AFh;100khz is bit rate from clock source
             ret


;SMBUS INITIALIZATON
SMBus_Init:  orl  SMB0CF,#080h ;SMBUS interface enabled
             setb tr0 ; Timer0 enabled
             ret


RECEIVE:  push ACC ; Preserve accumulator
            ;START  
	  setb STA ; Initiate Transfer
	  call delay_20ms
	  call delay_20ms
          clr SI			
	  jb arblost,SMB_END ; This read-only bit is set to logic 1 when the SMBus loses arbitration
		
; while operating as a transmitter for C8051f310

anl SMB0CN,#0f0h ; mask the 4 LSB bits
mov a,SMB0CN   ; mov SMBOCN 4 MSB bits to the accumulator
cjne a,#SMB_MTSTA,SMB_END  
  
; START : SMBus operating in Master Mode, SMBus in Transmitter Mode,;SEND CHIP ADDRESS AND WRITE ; when operating as a master, a START condition is transmitted if the bus is free					 
MOV SMB0DAT,#098h; mov address 10011000 to SMBus data register - WRITE Address
call delay_20ms	; Delay to receive ACK from CODEC
call delay_20ms ; Delay to receive ACK from CODEC
clr SI          ; SMBus Interrupt Flag  is cleared

		
;SEND MAP BYTE						
MOV SMB0DAT,#02h; mov map byte 01 (Chip I.D. and Revision Register) to SMBus data register
call delay_20ms ; Delay to receive ACK from CODEC		
call delay_20ms ; Delay to receive ACK from CODEC
clr SI ; SMBus Interrupt Flag  is cleared


;SEND STOP CONDITION
setb STO; Setting STO to logic 1 causes a STOP condition to be transmitted after the next ACK cycle.
call delay_20ms	; Delay to receive ACK from CODEC
call delay_20ms ; Delay to receive ACK from CODEC
clr SI; SMBus Interrupt Flag  is cleared

	
;SEND START
setb STA; Send a start condition
call delay_20ms; Delay to receive ACK from CODEC
call delay_20ms; Delay to receive ACK from CODEC
clr SI; SMBus Interrupt Flag  is cleared

;SEND CHIP ADDRESS AND READ
MOV SMB0DAT,#099h ; mov address 10011001 to SMBus data register -READ Address  
call delay_20ms	; Delay to receive ACK from CODEC	
call delay_20ms	; Delay to receive ACK from CODEC
clr SI; SMBus Interrupt Flag  is cleared
	
;Receive byte, contents of selected register.		
mov receive_byte,SMB0DAT; Receive byte, contents of selected register.                            
call delay_20ms ; Delay to receive ACK from CODEC
call delay_20ms	; Delay to receive ACK from CODEC
clr SI  ; SMBus Interrupt Flag  is cleared
	
setb ACK ; Acknowledge bit set 
;SEND STOP CONDITION 
setb STO; Setting STO to logic 1 causes a STOP condition to be transmitted after the next ACK cycle.
pop ACC; Restore accumulator
SMB_END:ret

timer0_isr: reti

delay_20ms:         push 00; Delay routine
                    push 01
                    mov r0,#255
delay_20ms_loop1:   mov r1,#255
delay_20ms_loop2:   djnz r1,delay_20ms_loop2
                    djnz r0,delay_20ms_loop1 
                    pop 01
                    pop 00
                    ret
end