| ??? 07/31/07 14:32 Read: times |
#142548 - clr TI Responding to: ???'s previous message |
At initialization You have
"setb TI" . This forces INT_SERIAL immediatelly after You enable ES+EA. In standard x51 there is only ONE interrupt-for receive and transmit. Both RI and TI must be handled in interrupt service routine. In Your case processor permanently enters interrupt routine , TI flag is settled and no one checks and clears. So: a)At initialisation TI must be cleared. b)You have two choices: - rewrite "serial_out" - first disable ES , send string, clear TI, enable ES. - rewrite "serial_out" - this routine can only set TI, wait some flag "message_transmitted" . This flag will be settled by extended interrupt routine. regards |
| Topic | Author | Date |
| Performance slows down when enabling serial ints. | 01/01/70 00:00 | |
| clr TI | 01/01/70 00:00 | |
| comments | 01/01/70 00:00 | |
| No TX interrupt servicing | 01/01/70 00:00 | |
| this is why we have FAQs here | 01/01/70 00:00 | |
replies to all | 01/01/70 00:00 |