| ??? 08/22/07 12:42 Modified: 08/22/07 12:50 Read: times |
#143512 - where did you read that? Responding to: ???'s previous message |
but i read that low at INT pin should be present at least for 4 machine cycles
It is possible that some derivative has that requirement, but the statement is not "biblical". is it for a non-12 clocker? quoting "the bible" http://www.nxp.com/acrobat_d...WARE_1.pdf "Since the external interrupt pins are sampled once each machine cycle, an input high or low should hold for at least 12 oscillator periods to ensure sampling. If the external interrupt is" this, of course might be different for a derivative that is not a 12 clocker. Erik |
| Topic | Author | Date |
| 8051 interrupt latency | 01/01/70 00:00 | |
| where did you read that? | 01/01/70 00:00 | |
| how to write ISR in C for 8051 | 01/01/70 00:00 | |
| Read the document! | 01/01/70 00:00 | |
| I do not know if micro can, it's in "the bible" | 01/01/70 00:00 | |
morning coffee | 01/01/70 00:00 |