Hi Stan,

CEX0 - CEX4 are "Capture/Compare Module EXTERNAL" I/O signals used by the Programmable Counter Array (PCA). I think their name is just a play on the Timer 2 "T2EX" input. They serve a similar function for the PCA modules as the T2EX signal does for the capture module of Timer 2.

Your second question is a little more involved but I think you are on the right track. If the SMBUS, SPI bus and UART were enabled in the XBAR0 crossbar register, but CEX0-CEX4 were not, then it is true, the ECI input would be mapped to the P1.0 pin. However, if none of the SMBUS, SPI, or UART peripherals were enabled in the crossbar, then ECI would map to P0.0.

The crossbar uses a priority decoder to make pin assignments. There is a table in the "Port Input/Output" section of the datasheet that defines the priority used. Some examples using the priority decoder for the C8051F00x family:

SMBUS enabled and ECI input enabled:
SDA = P0.0
SCL = P0.1
ECI = P0.2

SPI enabled, UART enabled, ECI enabled:
SCK = P0.0
MISO = P0.1
MOSI = P0.2
NSS = P0.3
TX = P0.4
RX = P0.5
ECI = P0.6

UART enabled, CEX0 enabled, ECI enabled:
TX = P0.0
RX = P0.1
CEX0 = P0.2
ECI = P0.3


If I've thoroughly confused you, check out the application note "AN001 Configuring the Port I/O Crossbar Decoder" on Cygnal's web site.