| ??? 10/10/07 17:37 Read: times |
#145607 - Power Idle Mode problem (PCON.0) |
Hi,
I'm having a problem with the TUSB5052 chip, a TI 8052-based USB controller chip. When coming out of Power Idle Mode, occasionally (maybe once every 500 cycles), the external 2K SRAM (external that is to the 8052, but internal to the TUSB5052) becomes inaccessible. That is, it always reads 0 regardless of what you write. The internal RAM (0 to FFH) still works and so do the MMR's (memory mapped registers) which are actually external memory mapped from ff80 to ffff. Does anyone have any idea what causes this and/or if there's a way to recover once the chip gets into this state? |



