UART clock is running at 16x the bit rate, i.e. 16 ticks in each bit.

This is insignificant in the transmitter (that simply divides this clock by 16 to get the bit clock), but the receiver needs to sample ("look at") the input really fast to catch the startbit high-to-low going edge soon enough; and then takes 3 samples at the 7-8-9th clock from the beginning of bit and uses a majority vote to determine the bit value - this is to suppress random spike noise. This procedure is in detail described in the "bible".

The another factor of 2 is just a divider and can be switched off using the SMOD bit (bit 7 in PCON SFR).

JW