| ??? 01/06/08 23:05 Read: times Msg Score: +1 +1 Good Answer/Helpful |
#149095 - Scarry Type ISR Programming Responding to: ???'s previous message |
Your interrupt programming is likely to break almost all the time. The simple ISR you have at 0x0003 is using both A and the R5 register. The interrupt can happen at almost any time within the main code flow, once enabled. I can see lots and lots of usage of the A register in this mainline code that is going to get totally trashed by your ISR.
Conventional ISR programming has the ISR save ALL registers that it uses and uses global memory variables for communicating between the interrupt environment and the mainline code. In general the idea to stitch an ISR into existing mainline code that used polled operation is not a good idea. You should carefully study a redesign of the whole code architecture. If I was doing this I would also add interrupt driven operation to the serial I/O using circular queues for the XMIT and RCV data flows. Michael Karas |
| Topic | Author | Date |
| Check my External Interrupt code | 01/01/70 00:00 | |
| new question about external interrupt code | 01/01/70 00:00 | |
| Scarry Type ISR Programming | 01/01/70 00:00 | |
| Problem solved...almost... | 01/01/70 00:00 | |
| Bogus Interrupt Usage | 01/01/70 00:00 | |
| An alternative to your solution? | 01/01/70 00:00 | |
set a trap and walk right into it | 01/01/70 00:00 | |
| A comment on comments | 01/01/70 00:00 |