??? 01/20/08 07:57 Read: times |
#149758 - read the manual Responding to: ???'s previous message |
What does the datasheet say?
AT89S52 datasheet on page 13 said:
The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. For me, it's quite clear. The reload occurs at the moment of counter rollover, and that moment also sets the TF2 bit which in turn causes interrupt to be invoked (if enabled, no other interrupt with the same or higher priority is currently served etc.). Thus, from the point of view of ISR, the rollover occurred BEFORE the interrupt gets executed. JW |
Topic | Author | Date |
When does timer 2 get reloaded? | 01/01/70 00:00 | |
Another thing | 01/01/70 00:00 | |
read the manual | 01/01/70 00:00 | |
what is register bank 5 supposed to mean?![]() | 01/01/70 00:00 |