The datasheet is incomplete. The Oscillator Bypass Fuse works the same way as in the newer single-cycle part AT89LP2052/LP4052, which also has a more complete datasheet (page 10):
"10.2 External Clock Source
The external clock option is selected by setting the Oscillator Bypass fuse. This disables the amplifier and allows XTAL1 to be driven directly by the clock source. XTAL2 may be left unconnected".

This means that with the Osc. Bypass fuse enabled, the internal power inverter (i.e. amplifier) is disabled and XTAL2 is tristated, while the external clock source on XTAL1 drives the chip clock tree directly.

The AT89S2051/S4051 datasheet shows on page 37 the required external clock waveform. Basically XTAL1 requires a CMOS driver between below 0.2*Vdd to above 0.7*Vdd (not TTL).

Also, even with the Osc.Bypass fuse disabled (i.e. XTAL2 is on) you can not use XTAL2 as a buffered output to drive other circuits without further precautions. If you use a crystal between XTAL1 and XTAL2 then even a logic probe will kill the oscillator because it has too much parasitic capacitance. If you keep the Osc. Bypass fuse disabled and drive XTAL1 from an external clock source, then XTAL2 functions as a buffer (it should be able to drive a logic probe), but be advised that the logic threshold is not at 0.5*Vdd, but constant at 1.2V and the rise time is not fast enough for 20 MHz full Vdd swing operation.

A better way is to use the AT89LP2052/LP4052 which has the System Clock Out option on port P3.7 when the System Clock out fuse is enabled.