I would be surprised if you will get a massive difference in cycles on such simple code.

I'm afraid you might be in for that particular surprise. The compiler is free to make the code as optimal or un-optimal as it deems fit. It could unroll the loop, eliminating a lot of the loop overhead altogether. It could be clever and make it a DJNZ loop (it'd have to be very clever, though. In the present form, Keil would not generate a DJNZ loop). It could keep the loop counter somewhere in data memory, or use a register, or perform some weird shuffling between ACC, registers and memory.

And on a 12-clocker with 24 MHz, one instruction cycle corresponds to 0.5 us, which is about 1% of the bit period. You don't need too many of these delays to deviate from the specified baudrate by a significant amount.