... is that BBRAM corruption, which previous cursory examination has shown can and will occur in the presence of a DS1232 supervisor, with that supervisor functioning just exactly as it should, at least insofar as I observed it at the time, which was not rigorous examination, will not occur with a power-down with the Vcc switched (drained) off before the MCU could execute another instruction and with a rise time considerably shorter than 10 milliseconds, has not occurred in what was, this morning, over 7.5 million repetitions.

The PC control system turns on the power, waits for a signal from the Voltage comparators which indicates that Vin is valid, then turns on the Vcc via a mosfet. This generates a power-on-reset via the RC circuit. It then waits for the end of RESET, and subsequently waits for a signal from the MCU that it has concluded its checksum of the BBRAM, whereupon it turns off the input power, then the Vcc, and immediately (after about 10 microseconds, because PC's are slow, clamps the Vcc to GND through 0.1 ohms. All the while, a logic analyzer is waiting for nPSEN, nWR, or nRD while RESET is true. The logic analyzer also does coarse monitoring of Vcc during RESET. The BBRAMs are DS1230Y-100 types. The MCU is a Philips P8031.

When this sequence has finished 10 million cycles, I'll conclude that it's possible to get through it without corrupting the BBRAM. Other tests will have to be used to verify other aspects.

RE