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???
05/31/08 08:27
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#155316 - looks good
Responding to: ???'s previous message
The only thing I can think of (except the messing up address of AUXR1, as Michael said), is that you don't have the same type of external (MOVX) memory mapped when you are writing your data and when attempting to program it.

There are several things what can go wrong:

  • XRAM might be mapped to EEPROM - see EEE SFR bit
  • XRAM might be mapped to external memory - see EXTRAM and XRSn SFR bits, and note also the setting of XRAM config bit (fuse) in HSB configuration word, if you are using a parallel programmer
  • an interrupt might have kicked in while in IAP - although IIRC this is quite fatal, you are supposed to have interrupts disabled during IAP in the T/AT89C51yx2
  • you might have been confused somehow by the MOVX @Ri, which works in a specific way in the 'RD2s (i.e. no external memory access while EXTRAM bit steers MOVX to internal XRAM)(doesn't sound too likely given you are using XRAM adresses 00xx)


I have tested the attached snippet just now - on a T89C51RD2, but I am quite confident it will work in the very same way on the AT. It just fills up the XRAM at 0080-00ff by a sequence of numbers (1,1,2,3,5,8,13,21,34,55,89,144,233,121,98,142 ...) and then calls your routine. If you burn this snippet into a chip previously erased, reset it and after a second read out its content, it should have the sequence burned at addresses 3000-307f. I assume you either have switched the XRAM bit in HSB to internal XRAM (or left untouched); or you do have an appropriately mapped external XRAM attached.


Good luck!

Jan Waclawek

PS. <shameless self-advertisement>I am using the IAP/09 call in my mod of BASIC52 for some time now, and it appears to work OK... </shameless self-advertisement>.


----------------


AUXR1 EQU 0A2H      


   mov   a,#1
   mov   r2,#1
   mov   dptr,#80h
   mov   r3,#80h
loop:
   movx  @dptr,a
   inc   dptr
   add   a,r2
   xch   a,r2
   djnz  r3,loop

   call  WRMEM

stop:
   sjmp  stop



WRMEM:	ORL	AUXR1,#01H	;ENABLE DPTR1
	MOV	DPTR,#80H	;ADDRESS OF BLOCK TO READ
	ANL	AUXR1,#0FEH	;ENABLE DPTR0
	MOV	DPTR,#3000H	;ADDRESS OF BLOCK TO WRITE
	MOV	A,#09H		;WRITE BLOCK BYTE
	MOV	R1,A		;MUST BE IN R1 FOR API
	MOV	A,#128		;BYTES TO WRITE
	ORL	AUXR1,#20H	;ENABLE BOOT ROM
	LCALL	0FFF0H		;PGM_MTP API ENTRY POINT
	ANL	AUXR1,#0DFH	;DISABLE BOOT ROM
	RET

   end
 


:1000000074017A019000807B80F0A32ACADBFA1287
:10001000001480FE43A20190008053A2FE903000A5
:0F0020007409F9748043A22012FFF053A2DF226B
:00000001FF

 



List of 9 messages in thread
TopicAuthorDate
Atmel 89C51RC2-UM and IAP            01/01/70 00:00      
   Check the datasheet of 89c51rc2-um            01/01/70 00:00      
   Erase the FLASH First?            01/01/70 00:00      
      take a note of            01/01/70 00:00      
         there's a difference between Atmel and Philips...            01/01/70 00:00      
            add that one to webster :)            01/01/70 00:00      
   looks good            01/01/70 00:00      
      Duh! I confused RAM and XRAM!            01/01/70 00:00      
         Now I can't get Erase Block working            01/01/70 00:00      

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