Have you considered RESTART the MCU by a warm boot ??

According to the "80C51_FAM_HARDWARE_1.pdf" :

<<==Reset====================================================>>
The reset input is the RST pin, which is the input to a Schmitt
Trigger. A reset is accomplished by holding the RST pin high for
at least two machine cycles (24 oscillator periods), while the
oscillator is running. The CPU responds by generating an internal
reset, with the timing shown in Figure 21.

The external reset signal is asynchronous to the internal clock.
The RST pin is sampled during State 5 Phase 2 of every machine
cycle. The port pins will maintain their current activities for
19 oscillator periods after a logic 1 has been sampled at the RST
pin; that is, for 19 to 31 oscillator periods after the external
reset signal has been applied to the RST pin.
The internal reset algorithm writes 0s to all the SFRs except the
portlatches, the Stack Pointer, and SBUF. The port latches are
initialized to FFH, the Stack Pointer to 07H, and SBUF is
indeterminate. Table 1 lists the SFR reset values. The internal
RAM is not affected by reset. On power up the RAM content is
indeterminate.
<<============================================================>>

Consider the code following just for a MCU ATMEL AT89S4051:

;====================================== Interrupt Vector Table ================     
    ORG 0x0000                         
    ajmp START                         ; RESET Vector
    
    ORG 0x0003
    ajmp EX0_isr                       ; External Interrupt 0 Vector
        
    ORG 0x000B
    ajmp T0_isr                        ; Timer 0 overflow Vector
    
    ORG 0x0013
    ajmp EX1_isr                       ; External Interrupt 1 Vector
    
    ORG 0x001B
    ajmp T1_isr                        ; Timer 1 overflow Vector
    
    ORG 0x0023
    ajmp Serial_isr                    ; Serial port (RI+TI) Vector
    
    ORG 0x0033
    ajmp AC_isr                        ; Analog Comparator Vector

;====================================== Interrupt Service Routines ============
START:      ljmp RUN_MCU               ; Goto START Program

; . . . 
; . . .
; . . . 
;

;====================================== RUN_MCU start everything ==============
RUN_MCU:                               ; FULL INITIALISATION of all SFRs
          //mov P0, #0x00              ; Port 0 does not exist on AT89S4051
          clr  IE_EA                   ; Disable any Interrupt Pending
          mov  SP, #STACK_START-1      ;
          mov  DPL, #0x00              ;
          mov  DPH, #0x00              ;
          mov  PCON, #0x00             ; SMOD1 SMOD0 PWMEN POF GF1 GF0 PD IDL
          mov  TCON, #0x00             ; TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
          mov  TMOD, #0x00             ; T1(G1 C/T1 M1 M0) T0(G0 C/T0 M1 M0)
          mov  TL0, #0x00              ;
          mov  TL1, #0x00              ;
          mov  TH0, #0x00              ;
          mov  TH1, #0x00              ;
          mov  CLKREG, #0x00           ; - - - - - - PWDEX X2
          mov  P1, #0xFF               ; Write 1's = Tristate Port Pins at P1
          mov  ACSR, #0x00             ; - - - CF CEN CM2 CM1 CM0
          mov  SCON, #0x00             ; SM0/FE SM1 SM2 REN TB8 RB8 TI RI
          mov  SBUF, #0x00             ; zero to Serial Buffer (NULL)
          //mov P2, #0x00              ;  Port 2 does not exist on AT89S4051
          mov  IE, #0x00               ; EA EC - ES ET1 EX1 ET0 EX0
          mov  SADDR, #0x00            ; Slave Address (ussualy not used)
          mov  P3, #0xFF               ; Write 1's = Tristate Port Pins at P3
          mov  IPH, #0x00              ; - PCH - PSH PT1H PX1H PT0H PX0H
          mov  IP, #0x00               ; - PC  - PS  PT1  PX1  PT0  PX0
          mov  SADEN, #0x00            ; Slave Address Mask (us.not used)
          mov  PSW, #0x00              ; Cy Ac F0 RS1 RS0 OV UF P
          mov  ACC, #0x00              ; zero to Accumulator
          mov  B, #0x00                ; zero to B Register 

iRam_clear: clr  A                     ; Clear all iRAM bytes 00h-FFh
          mov  R0, #0xFF               ; 
iRam_00:  mov  @R0, A                  ;
          dec  R0                      ;
          cjne R0,#0, iRam_00          ;   
          
          ljmp main                    ;