I'm doing something a little off the beaten path, and am having some trouble getting the relevant information from Maxim, so I thought I'd ask you guys, just in case somebody's seen anything relevant.

I'm using DS89C450, at 33 MHz with external data memory greater than 64 kB. I'm moving data to/from this memory block without passing it through the MCU, in 16-bit words rather than bytes, to/from a fixed I/O address also in external data space. In order to make the addresses cross a 64 kB boundary smoothly, I'm wanting to use the falling edge of A15. Though this appears to work OK, I haven't any spec's on which to rely, and I'd appreciate any insight other users of this device may have gained through observation.

Now, what I'm doing is transferring the data by setting the DPTR to the memory address and using a block of straight-lined MOVX instructions invoked as a macro with the DPTR set to auto-increment in order to generate the addresses.

What I need to know is just exactly when you see the address changing during ALE. In Page-Mode-1, P2 should remain static, holding the high byte of the 16-bit address until ALE is high. However, P2 can also hold a value unrelated to the off-chip memory bus address when executing code located in on-chip code space. The datasheet and user guide has not included this set of conditions among those it describes, and, frankly, some key bits of information are omitted anyway. That's not necessarily the case in non-Page-mode though it appears to be. I believe I see the transition clearly during ALE, but I'm concerned about boundary conditions, i.e. when the straight-lined code is entered.

What have you observed?

RE