| ??? 01/06/09 22:34 Read: times |
#161340 - Solution? Responding to: ???'s previous message |
After doing some reading and searching for examples I think I understand the solution. Please let me know if I am off base with anyhting.
Since I am only using 8 pages I have 5 page bit that I can use in chip select equations. I am going to designate pgr7 as my bit to swap from code A/B. Just swo I don;t confude myself and others, I am only going to talk about page 5/6 which I am using for application code. If I set my memory map for fs5 and fs6 to be: fs5 = (page == 5) & (address >= 0x8000) & (address <= 0xFFFF) & (!pgr7) fs6 = (page == 6) & (address >= 0x8000) & (address <= 0xFFFF) & (pgr7) Then page 5 will be accessed if pgr7 is '0', and page 6 will not be accessed. When pgr7 is '1' then page 6 will be access and page 5 will not be accessed. Correct? |
| Topic | Author | Date |
| Banking and IAP Question | 01/01/70 00:00 | |
| firware or application | 01/01/70 00:00 | |
| firmware or application | 01/01/70 00:00 | |
| terminology, page register | 01/01/70 00:00 | |
| terminology, page register | 01/01/70 00:00 | |
| Solution? | 01/01/70 00:00 | |
| what is pgr7? | 01/01/70 00:00 | |
| pgr7 | 01/01/70 00:00 | |
| you already do have page register bits involved... | 01/01/70 00:00 | |
you already do have page register bits involved... | 01/01/70 00:00 |