The two previous posters reveal the ambiguity of the question.

My guess is that you are asking about the address latch required in some systems to demultiplex the 8051's address/data lines.

This was a conscious decision on many of the early Intel processors when both silicon and packaging were at a premium.

By sharing address and data signals on a common set of pins, the 8051 conserves I/O pins. Address and data are multiplexed on those pins. The ALE signal indicates when addresses are valid and when they should be latched externally.

Back then, the external latch required to hold the address lines was far cheaper than the extra 8 I/O pins. Now, that latch is frequently integrated into the external memory, as mentioned in a previous reply, or integrated into a modernized 8051, such as the Triscend E5 family. The E5 has a glueless interface to standard byte-wide memories.