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??? 05/04/09 19:41 Modified:   05/04/09 19:44 Read: times	#165039 - 300MHz Responding to: ???'s previous message
	In ASIC... Kai

List of 74 messages in thread

Topic	Author	Date
max clk freq		01/01/70 00:00
Which		01/01/70 00:00
300MHz		01/01/70 00:00
.		01/01/70 00:00
Does that make it effectively 600MHz, then...?		01/01/70 00:00
That are the links I found...		01/01/70 00:00
Interesting item, but did you notice ... ?		01/01/70 00:00
300Mips, equivalent to 3.6GHz!		01/01/70 00:00
That's slightly misleading ...		01/01/70 00:00
You sure about your math?		01/01/70 00:00
It's confusing ... typical marketing drivel		01/01/70 00:00
Based on the claims you posted		01/01/70 00:00
Those aren't my claims!		01/01/70 00:00
Read comments _before_ (not) answering them		01/01/70 00:00
Architecture speed		01/01/70 00:00
That was my take too		01/01/70 00:00
Of course, it does not depend on CLK frequency!		01/01/70 00:00
I cannot see a confusion		01/01/70 00:00
Not all one-clocker mfg's make the same claims		01/01/70 00:00
But...		01/01/70 00:00
comparison of 12- and less-clockers		01/01/70 00:00
Very nice!		01/01/70 00:00
Cool!		01/01/70 00:00
Good overview		01/01/70 00:00
Another link		01/01/70 00:00
Dhrystone?		01/01/70 00:00
Yes ... one could argue that the core is hobbled		01/01/70 00:00
to sell IS useful... ;-)		01/01/70 00:00
Dhrystone		01/01/70 00:00
give data		01/01/70 00:00
I find it useful...		01/01/70 00:00
Nonsense		01/01/70 00:00
Nice attitude...		01/01/70 00:00
One thing that would be useful for FPGA		01/01/70 00:00
Still waiting		01/01/70 00:00
Here it is ... It's simple arithmetic		01/01/70 00:00
Not at all!		01/01/70 00:00
You missed the "at the same frequency" part		01/01/70 00:00
You're right, in a sense ...		01/01/70 00:00
Still thinking of the DT8051 as 12-clocker		01/01/70 00:00
Gee ... I can see where I went off the track!		01/01/70 00:00
You deserve respect for that...		01/01/70 00:00
Very easy to miss things		01/01/70 00:00
It is a shame the documentation is so superficial		01/01/70 00:00
Marketing demagogy		01/01/70 00:00
baloney		01/01/70 00:00
Insignificant?		01/01/70 00:00
the "classical" timing		01/01/70 00:00
Fair claim		01/01/70 00:00
Not so fast, there, Pilgrim...		01/01/70 00:00
Any alternative?		01/01/70 00:00
Possibly ... ???		01/01/70 00:00
Still pipelining		01/01/70 00:00
It doesn't have to pipeline		01/01/70 00:00
What use?		01/01/70 00:00
if critical, lock - if you can		01/01/70 00:00
What question?		01/01/70 00:00
Whatever happened to Amit Mittal ?		01/01/70 00:00
maximum speed of a car		01/01/70 00:00
Pigeon Poster?		01/01/70 00:00
no question, uncernity		01/01/70 00:00
It's not that difficult ...		01/01/70 00:00
Are we talking about the same thing?		01/01/70 00:00
It is a matter of how you choose to view things		01/01/70 00:00
Q still open: any 8051 with only two clock transitions?		01/01/70 00:00
I do not believe bigger is better ...		01/01/70 00:00
You argue quite much for not caring		01/01/70 00:00
Without going into too much detail ...		01/01/70 00:00
Pipeline for concurrency		01/01/70 00:00
One step at a time		01/01/70 00:00
Many steps at the same time		01/01/70 00:00
1-clocker without pipelining		01/01/70 00:00
Interesting link - I just wish it was a bit meatier		01/01/70 00:00
what the datasheet for the particular device states		01/01/70 00:00

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