Hi,

I have got a question about the Aduc812 Simulator you've developed for Analog Devices (currently i run v3.635).

I wrote a simple assembly language program that sets the ADCCON2 register so it has a MCLK divider of 4. With a crystal of 11-12 Mhz this would yield a Adc clock of around 3Mhz. Given a 16 cycle conversion time i expect the sample rate to be around 180ks/s (in the range of 6-7cpu cycles). If i run this program in the simulator i see coversion times (time between the setting of the SCONV bit and the ADCBusy bit being cleared) of 10-11 cycles. The same holds for using a T2 triggered ADC. The conversion time seems to long. Futhermore do i see no effect at all of the additional hold times one can specify in the ADCCON2 register at all.

Any suggestions what might go wrong? My goal is to obtain around 100ks/s sample rate without using dma as our design uses external memory so won't allow dma mode at all.
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Wim van der Vegt