| ??? 09/29/09 20:58 Read: times |
#169271 - prototype visible to main Responding to: ???'s previous message |
Sarma,
Is the ISR implementation or its prototype visible to main? As documented SDCC needs this to generate the interrupt vector. Maarten |
| Topic | Author | Date |
| Timer 2 Interrupt Enable? | 01/01/70 00:00 | |
| do you actually clock the T2EX? | 01/01/70 00:00 | |
| Yes I am | 01/01/70 00:00 | |
| prototype visible to main | 01/01/70 00:00 | |
| Some Differences Found in Documentation | 01/01/70 00:00 | |
| who know the most about NXP chips ? | 01/01/70 00:00 | |
| Can't Get Your Point | 01/01/70 00:00 | |
| YES | 01/01/70 00:00 | |
| One Problem Fixed | 01/01/70 00:00 | |
| wrong include | 01/01/70 00:00 | |
| This was the Exact Problem | 01/01/70 00:00 | |
re include files | 01/01/70 00:00 | |
| Please check .RST file | 01/01/70 00:00 |