| ??? 02/22/02 20:54 Read: times |
#20071 - RE: Question about the Counter of the 89C205 |
The MCS 51 Microcontroller Manual states:
"There are no restrictions on the duty cycle of the external input signal, but to ensure that a given level is sampled at least once before it changes, it should be held for at least one full machine cycle." For a controller that uses 12 clocks per cycle I would surmise that the input frequency would have to be something less than 1 MHZ, to make sure the required level is there at sampling time (for 8052 it is at S5P2). There are 6 States with 2 Periods each. S5P2 would be very near the end of each cycle. Hope this helps Hal |
| Topic | Author | Date |
| Question about the Counter of the 89C205 | 01/01/70 00:00 | |
RE: Question about the Counter of the 89C205 | 01/01/70 00:00 |



