Hi Lawrence,

I tested now the bug and it is still present on an AT89S8252 dated as 0133.
Following the Answer from Atmel long time ago.
The "short-term solution" may exceed 4 years soon.



Date: Tue, 19 May 98 18:06:43 PDT
From: david@atmel.com (David Lee)
Message-Id: <9805200106.AA11831@ipanema.sjo.atmel.com>
To: danni@specs.de
Subject: Re: Programming 89S53
Cc: dlee@atmel.com
Content-Type: text
Status: RO
X-Mozilla-Status: 0000


Peter,


I have checked the AT89S53, and yes, it does share the same problem in the
timer 2 clock-out function as the previous design of the AT89C52 and AT89C55.
Unfortunately, we have not yet made a mask revision to fix this problem in
the AT89S8252/AT89S53.
Basically, the problem can be described as follows:
We differ from an Intel part at P1.0 with bit-wise instructions. In gen-
eral, an instruction reads the whole 8-bits, changes the specified bit,
and writes back the entire 8-bits. The Intel parts do not write P1.0 when
a Port 1 pin other than P1.0 is addressed in bit-wise instructions; ours
do. If P1.0 toggles during a bit instruction for Port 1, it may read P1.0
before it is toggled and write it back after it is changed. All of this is
related to the Read-Modify-Write feature described on page 2-42 of our Dec-
ember 1997 edition of the Microcontroller Databook.
The short-term solution is not to use Port 1 pins if bit-wise instructions
are needed, while the clock-out mode is being used. I hope this is possible
in your application, as the problem will affect all the port 1 pins besides
P1.0.
Best regards,

David Lee (dlee@atmel.com)
ATMEL Microcontroller Applications