| ??? 05/01/02 15:40 Read: times |
#22367 - RE: Internal EEPROM T89C51CC01 |
Hi Bert,
If you haven't already gotten one, you'll need to create a header file specifically for that chip that defines all the new SFRs and bits that you need/want to access. For example, sfr EECON = 0xD2; #define EEE 0x02 #define EEE_reset 0xFD #define EEBUSY 0x01 Then create a pointer to xdata (this is how IAR's compiler works for me, Keil might be different): char *eeprom; eeprom = (char xdata *)<address>; Then follow the spec: EECON |= EEE; // set EE enable *eeprom = <write byte>; // write a byte EECON &= EEE_reset; // reset enable The compiler when it generates xdata accesses handles all the load DPTR and MOVX stuff. Good luck, Dennis |
| Topic | Author | Date |
| Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
| RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 | |
RE: Internal EEPROM T89C51CC01 | 01/01/70 00:00 |



