I have not been able to locate any app note and was hoping someone on this board could help me. I am attempting to design an address decoding scheme for a Temic 80C51 that uses a 256Kx8 Flash such as the ST 29F002B and a 128Kx8 SRAM such as the Cypress CY62128. I am new to 8051 design so I may be overlooking a obvious solution, but I have yet to an app note that has solved my particular challenge.

The address space issue of Data Space vs Program Space is causing me some heartburn. The problem is this:

I need to be able to update the code in my flash at anytime. To do this, I will need to execute my code from RAM while performing the code update. During the update, I believe my FLASH will need to be mapped as Data Space, and part of my RAM, say 8K worth will need to be mapped as Program Space.

This is the jist of my problem, although there are secondary issues, such as memory mapping the data space for 2 program images, I/O, both fixed and paged RAM areas all into a 64K block. The program space memory map will be somewhat more straightforward using 8K of the 64K for boot code, 48k of program code, and 8k for RAM.

Has anyone seen an app note that describes how to implement a Flash scheme similar to what I have tried to describe above?

Thanks,
Paul