Hi Bahri,

I designed the parser from scratch. Actually its a generic Parser class which I sub-classed into EqnParser and LogicParser classes (and in the future,hopefully, a SQLParser class). It's pretty straightforward; I wrote my own generic tokenizer (lexical analyser) to provide the tokens, which I fed to a stack-based look-ahead left-to-right parser.

I had researched readymade alternative such as Lex and YACC, but decided that writing my own would be more challenging and easier to optimize. Also I made the code more portable to C++.

The input is in the form of statements like "If I1 = Open And (I2 = Closed Or I3 = Open) Q1 = On", something like a verbose STL. I am working on a more compact language. So based on the states of I1, I2 and I3 it determines the values of Q1. I was planning to generate a ladder diagram out of this which I could simulate, if not actual PLC code :))

"I also wonder this. Interpreting seems as the simplest -and slowest- way, but generating real 8051 code from PLC code should be hard if you program the PLC system code in C. "

Yes, I think so too. If you want to generate the 8051 code from the STL, it will be a full-fledged compiler. A very specialized compiler, but challenging none-the-less. I can imagine designing it though, since a stack-based logical parser is nothing more than AND, OR and PUSH/POP statements.

Briefly, one way to generate 8051 code from the Statement Language above would be to use the following mapping between STL and assembly:
(start with C having value '1')
(Bn = Bit address mapped to In)
(On = Bit address mapped to Qn)
AND I1 = OPEN -> ANL C, B1
AND I1 = CLOSED -> CPL B1; ANL C,B1
OR I1 = OPEN -> ORL C, B1
OR I1 = CLOSED -> CPL B1; ANL C,B1
( -> Push current state of C on stack
) -> Pop current state of C from stack
THEN Q1 = OPEN -> ORL C, O1
THEN Q1 = CLOSE -> CPL C; ANL C, O1

The other 8051 code would be intialization stuff generated from declarations of the number of inputs etc. Also there would have to be paging of the process input and output images between the bit-addressable area and byte-addressible areas of RAM, in case the number of I/p + O/p exceeds 128.

Timers and latches will be a different proposition altogether!!

Kundi