Isn't that also what the 8259 Programmable Interrupt Controller sort of did for the x85/86 processors?

It could also be possible to design a similar circuit for the '51 using discrete digital components... basically a latching multiplexer, that's what is needed. Suppose a circuit is to multiplex 16 interrupts onto one pin... All interrupts are given to a circuit, which transmits any received signal to the external interrupt pin on the 51. The source of the interrupt is mapped (encoded) to some binary value, and made available and latched onto 4 output lines. These 4 lines are connected to some 8051 port. The 8051 can then read the pins to determine source of interrupt. The circuit should not receive any more interrupts until the ISR in the 8051 resets the latch. 6 pins (1 int, 1 latch reset, and 4 signal source lines) for 16 interrupts. The tradeoff makes more sense for 8+ number of interrupts.

I am not aware of any, but I am sure there are chips available that do this for you, and better (priority etc).

Kundi