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???
08/20/02 03:37
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 		 #27545 - RE: Alan
hi frank:
two problems:
1.you are enabling 2 interrupts(ie=91h)where is t0 isr?
2.since t0 interrupt is enabled on branching to ISR, tf0 will be cleared automatically by hardware.you shall never sense tf0 as set by
using jnb tf0,$
pranav

List of 11 messages in thread
TopicAuthorDate
IE0 and TF0            01/01/70 00:00      
RE: IE0 and TF0            01/01/70 00:00      
RE: IE0 and TF0            01/01/70 00:00      
RE: IE0 and TF0            01/01/70 00:00      
RE: IE0 and TF0            01/01/70 00:00      
RE: Alan            01/01/70 00:00      
RE: Alan            01/01/70 00:00      
Hope this works for you.            01/01/70 00:00      
RE: Hope this works for you.            01/01/70 00:00      
RE: IE0 and TF0            01/01/70 00:00      
The problem is solved            01/01/70 00:00      

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