Bayaraa,

Here's a link to the datasheet -

http://www.national.com/ds/AD/ADC0808.pdf

Find the End of Conversion signal (EOC). That signal may be connected to an interrupt line on a micro or connected to a general purpose I/O line and polled. Looking quickly at figure 4 of the datasheet, I find about 12 clock cycles are required to select the channel, convert and access the data. In the datasheet (electrical characteristics, page 4) there are several parameters that have minimum durations. You should compare the minimum duration with clock duration to determine if more than (or less) clock cycles are necessary.

Why not design your circuit to operate at the maximum clock frequency, but write the firmware to access the data at the rate you wish? Your next project might need a higher conversion rate than 50 Hz.

Bruce