Why not? It seems to be an interesting project, and a similar application for parallelizing the FFT was discussed some time back on the forum.

In SIMD, the multiple processors are generally simple ALUs and Processing Elements (PEs), not really CPUs by themselves. But with a full-fledged uC like the 8051, you can actually have 'smart' PE,
but I know not what possibilities / advantages / complications that will introduce.

The network architecture itself is an interesting issue: It can be bus-based or grid-like or star-configuration. Memory sharing /access is another problem. Depending on these two, you will have to design the controlling CPU program for scheduling, communication and synchronization.

What sort of processing-intensive applications can you visualize the 8051 to be doing? Whatever it is, the latencies introduced by inter-processor communication must be more than covered by the calculations carried out by each processor, and I can't think of many such applications.

kundi