Seing the post from Kostas and not knowing of any IIC problem myself, I obtained a copy of a soon to be published updated errata for the 668.
The addition to the currenly published is:
Problem: When timer1 is selected as the source for the IIC clock )CR0=CR1=CR2=1) the clock rate deviates from the formula specified in the datasheet.
Workaround: Use only the system clock (fixed prescaler) as ther IIC clock source, do not use timer1 as the clock source.

Also there is an, in my opinion stupid, "errata" that if you exceed the maximum negative voltage on the port pins, the chip might go bad. How can it be an errata that the chip goes bad if you exceed maximum ratings?

Erik