See the data sheet for this part at...

http://www.atmel.com/atmel/acrobat/doc0368.pdf

The power down mode is described in small detail. This ia a standard architecture 8051 part inside for the most things. The PCON register located at SFR address 0x87 has its two low bits used to assert either of the IDLE mode or the POWER DOWN mode. Note that this part can only exit from power down via application of a RESET signal. Other 8051 clones such as a genuine Intel part would also exit POWER DOWN from an enabled extenal interrupt. ATMEL and others have elected to support RESET only exit from POWERDOWN mode so that the absolute minimum of circuitry need be left powered on board the chip. This facilitates the lowest possible Idd current during the power down state.
Mike Karas