If you use the "a is clock, b is direction" method you WILL get errors. The lenghty proof was made 1-2 years ago and I do not have the time to reproduce it. Write out a timing chart with all reversals

changing from fwd to reverse
a    b
h    v
h    ^
l    v
l    ^
v    h
^    h
v    l
^    l
changing from reverse to fwd
a    b
h    v
h    ^
l    v
l    ^
v    h
^    h
v    l
^    l

then you will see.

You ned to set up the CPLD first to synchronize the input (2 d-flops signal forward only when identical) then base the count direction on current state, previous state and current direction.

Another way to do this is to use a (is it honeywell or HP ?) chip that does the direction detection for you, then you can use 4 series 74 cascadeable up/doen counters in series.

Still, when I did it the CPLD solution came out much better.

If your maximum clock is fairly low you can implement it all in a microcontroller if it does not have much else to do.

Erik