It is way better to generate waveforms using the timer 2 in High Speed output mode (for those derivatives that support it) or to use a channel of a PCA module. These inplementations toggle the output bit in hardware and then generate the interrupt afterwards. This removes any output jitter caused by interrupt response latency.

There is a technigue that can be used to generate jitter free timing on an arbitrary output pin using a timer 0 or timer 1 type of interrupt however. It requires a technigue where by the processor has to allocate some bandwidth to pulse generation and you need to know what the worst case interrupt latency would be. Here is how it works....

Lets say that you wanted to have an output toggle at a 100 Hz rate in a square wave with no jitter. This corresponds to a toggle at 200 Hz or equivalently an interrupt every 50 milliseconds.

Lets just guess that the worst case interrupt latency of the software/hardware configuration is measured at 600 uSec (the main line code may have some places where the interrupts are disabled for periods of time).

So you decide to commit some processor bandwidth in exchange for stable output waverforms. For a 600 uSec latency you may decide to allocate 1 millisecond per 50 millisecond output waveform period. Just make sure that the allocated time is longer than the worst case latency.

OK next when you start up the timer interrupt you program the period of the interrupt to 49 milliseconds instead of the 50 mSec you need. After 49 mSec when the interrupt occurs --

- Disable all other sources of high priority interrupts if any are used.
- Re-program the timer interrupt for 1 mSec period.
- Set the timer interrupt to high priority.
- Set a bit flag indicating you are stacking a 2nd level interrupt.
- Enter idle power down mode to wait for the 1 msec interrupt (this interrupt becomes stacked on top the 49 mSec interrupt.
- The interrupt restores the processor back from idle mode.
- The software enters the ISR again and notes the stacked bit set and goes to code to toggle the output port bit.
- reprogram to generate at the next 49 mSec period.
- Clear the interrupt stacked bit.
- Do a RETI to exit from the 2nd level interrupt.
- Resume code execution in the first level interrupt routine.
- Restore the timer interrupt as a low priority interrupt.
- Renable the other high priority interrupts if any used.
- Finally do an IRET from the first level interrupt.

In this sequence the 1 millisecond portion of the interrupt acts like an elastic equalizer to remove interrupt jitter from the first level due to mainline code execution. The 1 millisecond interrupt always happens from a state of exiting from IDLE mode so the time from this interrupt through to toggling the port pin is a fixed and predictable amount of time.

Hope this can help somebody...
Michael Karas