I need to understand data bus andaddress decoding and how it works inside the MCU.
I know there is a lot in that message but if someone could take some time to answer
to my questions that would help me a lot !


let's say I have a 8051 mcu with one external eprom and one external ram (ram1)
the ram's are from toshiba : tc551001.

I want to add 2 extra devices on a 8 bit bus (1 LCD and 1 RAM (2)). the /WR and /RD
from the 8051 will be connected respectively to the /WE and /OE of the RAM's,
CE2's connected to VCC and /CE1 use for the chip select. I have P0 and P2 used to
create the address/data bus.

If I define the addresses for the LCD and RAM2 as followed:

ADR_LCD EQU 0F000H ; chip select for LCD
CS_RAM2 EQU 0E000H ; chip select for RAM2

What choices have I got to create the chip signal (CS):

-------------
For the RAM'S
-------------

1)if I use a PAL device or 74LS138 (or what else ?) for CS then does it
means that I can only use (for RAM1) external data location from 00000H
to 0DFFFH and for RAM2 external data location from 0E000H to 0EFFFH
(since higher is used by LCD), and therefore not being able to use the
full amount of memory (64K for both RAM). The way I see it is that the CS signal(s)
can only be higher than 8 bits (00100H minimum) since the high 8 bit
address (P2) remains unchanged while P0 is latched and then used to
read/write data from device. For RAM2 CS_RAM2= /(A15 & A14 & A13) (active
low for CS) are necessary for the address decoding (for RAM1, CS_RAM1=A13 only).
Am I correct or way out of line ?

2)if I use a dedicated pin (P1.0 for example) to select RAM1 and P1.1 for RAM2
and then I have no limitations for data capacity (if 1) is correct...).I will
have to make sure in the software that the correct CS is activated.

for example, here is a simple program (line1,2,3 are only mentionned
to clarify the problem and should obliously not be included into code...)
:

...
line1 MOV DPTR, #ADDRESS ; load an address into DPTR
line2 MOV A, #NUMBER ; and load a number into ACC
line3 MOVX @DPTR, A ; write number stored into ACC at external address
; defined by value in DPTR
...

Now from the mcu, for the 2 first instructions :
line1 : 3 bytes, executed in 2 machine cycles (mc) and will be read from eprom.
line2 : 2 bytes, 1 mc and will be read from eprom.
line3 : 1 byte, 2 mc and data is written to external RAM

the MOVX instruction will activate the /WR signal (or /RD if read operation
MOVX A, @DPTR) from the MCU, but how do I know where the data is written
(RAM1 or RAM2). will it be RAM 1 if ADDRESS is lower than 0E000H and RAM2
if higher than 0E000H ?

-----------
for the LCD
-----------

LCD used is based on HD44780 controller, connected to 8 bit data, 3 extra lines
for RS, R/W and E. I have to say I don't know how to do it (for a change...!)
the data can be read or write on the falling edge of E signal. I have seen one
example (read character at position of cursor) :

in the definition for ADR_LCD the following comments are added :
ADR_LCD+0 : write character control
ADR_LCD+1 : write character (display)
ADR_LCD+2 : read busy flag (7) and current address
ADR_LCD+3 : read character at cursor


LCD_READ: PUSH DPL ; save DPTR into stack
PUSH DPH
MOV DPTR,#ADR_LCD+2 ; read busy flag and address
lcdr0: MOVX A,@DPTR
JB ACC.7,lcdr0 ; wait for lcd
INC DPTR ; ADR_LCD+3
MOVX A,@DPTR
MOV R7,A ; save address into R7
PUSH DPH ; restore DPTR
PUSH DPL
RET ; exit

I have to say I don't understand how it works since I don't see any instruction
to create the falling edge for E. and I hope I give enough informations

As the number of devices are added onto the bus, do I need to add a buffer?.
I have seen one application with a 74HC245 buffer with DIR signal defined
by /RD and PSEN from MCU. Where does it come from ? I am sure someone will reply :
read the datasheet ! I did and I don't understand.


Thanks for helping me.