"Most 8052 derivatives handle code size greater than 64K by using code banking. This requires use of some port pins" (my emphasis).

Not necessarily; eg, the 8032 MCU "core" within the Triscend E5 has the standard 16-bit DPTRs and program counter, so the 8032 MCU "core" can never "see" more than 64K of code and 64K of data at any one time. The E5 has internal [1] "Address Mapper" registers which allow you to address pages within the external 32-bit address space without the need for any port pins.

I don't know, but I imagine that the PSD would have a corresponding "internal" or "soft" mechanism?

You can read all about the E5 at http://www.triscend.com/products/e5.htm

[1] that's internal to the E5 device, but outside the 8032 MCU "core".