I would re-write your code for the initialize following what Peter has suggested. First you can see that Peter's approach is better because the RCAP2H/RCAP2L pair gets completely programmed before the TH2/TL2 pair. Many 8051 processors contain some logic that deals with an update of a 16-bit entity by auto-stopping the counter between the two individual byte writes. This logic works provided the bytes are written in the correct order. It is possible that this defer logic gets messed up on your processor when you intermix the update of two 16-bit registers at the same time. Why? Possibly because the two registers share some of the same defer logic.

Secondly Peter has shown writing the T2H/T2L pair to a -1 value (0xFFFF). This has the effect of making the first update of the T2 timer occur right away. If this is not done carefully it is possible that the very first baud rate clock to the UART could be shorter/longer than expected and then the very first bit could have its timing effected. This is just a guess because without the actual T2 timer circuit schematic in hand it is difficult to know if this could really happen.

MICHAEL KARAS