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???
09/09/03 14:56
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#54409 - RE: Having trouble with 89S8252 SPI
Responding to: ???'s previous message
Hi,
first time it receives garbage
No, it receives previous state of SPDR of a slave. If you wish to read back value you sent to slave, then make additional data transfer from master. You should understand that SPI does receiving and sending simultaneously. It means that at same time when master transmits new byte, it receives old byte from slave as well. By other words, in your code if you needs with reading reply value then you should make second master transaction (it produces clocks to slave and makes him able to send new byte to master back).
Second issue is about that you do not indicate how do you configure output pins on the both devices - I mean the MISO/MOSI/SCK pins. Looking on the code I see that you use Clock Polarity and Clock Phase both = 0. At such configuration, if you do not clear SCK pin somewhere before then first clock pulse from master may not be detected by slave. I recomend you to use polarity=0, phase=1 and set to '1' SPI-related pins.
For details read next datasheet, it has an example: http://www.atmel.com/dyn/resou...OC1018.PDF
Good days!


List of 4 messages in thread
TopicAuthorDate
Having trouble with 89S8252 SPI            01/01/70 00:00      
   RE: Having trouble with 89S8252 SPI            01/01/70 00:00      
      RE: Having trouble with 89S8252 SPI            01/01/70 00:00      
      RE: Having trouble with 89S8252 SPI            01/01/70 00:00      

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