Hi Steve,

I never watch about WCOL.
I write to SPDR and poll SPIF until it was high again.
So I see no condition, which can set WCOL.
Yes, SPIF was automatically cleared on every write to SPDR.

Following the example for an ADC. It works great.

xADC = 0;
SPDR = mux_channel * 0x20; // next mux address out
while( (SPSR & SPIF_) == 0);
val = 256 * (SPDR & 0x0F); // high byte in
SPDR = 0xFF;
while( (SPSR & SPIF_) == 0);
val |= SPDR; // low byte in
xADC = 1;


Peter