According the AT89C51RD2 manual, this chip does control it all internaly:

When the power is applied, the Power Monitor immediately asserts a reset. Once the internal supply after the voltage regulator reach a safety level, the power monitor then looks at the XTAL clock input. The internal reset will remain asserted until the Xtal1 levels are above and below VIH and VIL. Further more. An internal counter will count 1024 clock periods before the reset is de-asserted.

Reading on information above, I think that Atmel`s engineers have been a bit tired about problem of "External Brown-out Protection for C51 Microcontrollers with Active High Reset Input". As result they built the reset control logic inside new revisions of chips. I know that at least RD2/ED2/ID2/CC03 have these features inside.
Due some reason it does not work for Petr; I need to know why?
Good days!